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Also changes it from a static method to an instance method.
This addition allows an end-user to inspect whether the env clear value is set on a `Command` instance or not. Discussed in: - rust-lang#149070 - rust-lang/libs-team#194
…rent. Reverts 68a7c25 in library/
…g elements if lengths are different.
Implement `gather_bits`, `scatter_bits` functions on unsigned integers Add tests to coretests
And if an allocation while printing the backtrace fails, don't try to print another backtrace as that will never succeed.
…write-slice, r=Mark-Simulacrum Stabilize `maybe_uninit_write_slice` Stabilize feature `maybe_uninit_write_slice` (closes rust-lang#79995). Note that this also const-stabilizes `<[MaybeUninit<_>]>::write_copy_of_slice`. That method depends on `<[_]>::copy_from_slice`, which is already const-stable, and `<[MaybeUninit<_>]>::assume_init_mut` which is now also stable.
Add a diagnostic attribute for special casing const bound errors for non-const impls Somewhat of a follow-up to rust-lang#144194 My plan is to resolve https://github.com/rust-lang/rust/blob/f4e19c68786211f3c3cf2593442629599678800a/compiler/rustc_hir_typeck/src/callee.rs#L907-913 but doing so without being able to mark impls the way I do in this PR wrould cause all nice diagnostics about for loops and pointer comparisons to just be a `*const u32 does not implement [const] PartialEq` errors.
…=Mark-Simulacrum Add Command::get_env_clear This addition allows an end-user to inspect whether the env clear value is set on a `Command` instance or not. Discussed in: - Tracking issue: rust-lang#149070 (partially closes) - ACP: rust-lang/libs-team#194
…k-Simulacrum num: Implement `uint_gather_scatter_bits` feature for unsigned integers Feature gate: `#![feature(uint_gather_scatter_bits)]` Tracking issue: rust-lang#149069 Accepted ACP: rust-lang/libs-team#695 (comment) Implement `gather_bits`, `scatter_bits` functions on unsigned integers Add tests to coretests This implementation is a small improvement over the plain naive form (see the [solution sketch](rust-lang/libs-team#695)). We only check the set bits in the mask instead of iterating over every bit.
…unk, r=Mark-Simulacrum optimize `slice::Iter::next_chunk` codegen for example (sourced from rust-lang#98326 (comment)) ```rust pub fn simd_sum_slow(arr: &[u32]) -> u32 { const STEP_SIZE: usize = 16; let mut result = [0; STEP_SIZE]; let mut iter = arr.iter(); while let Ok(c) = iter.next_chunk::<STEP_SIZE>() { for (&n, r) in c.iter().zip(result.iter_mut()) { *r += n; } } result.iter().sum() } ``` goes from (znver4) <details> <summary>many asm</summary> ```assembly simd_sum_slow: .cfi_startproc push rbp .cfi_def_cfa_offset 16 push r15 .cfi_def_cfa_offset 24 push r14 .cfi_def_cfa_offset 32 push r13 .cfi_def_cfa_offset 40 push r12 .cfi_def_cfa_offset 48 push rbx .cfi_def_cfa_offset 56 sub rsp, 240 .cfi_def_cfa_offset 296 .cfi_offset rbx, -56 .cfi_offset r12, -48 .cfi_offset r13, -40 .cfi_offset r14, -32 .cfi_offset r15, -24 .cfi_offset rbp, -16 lea r12, [rdi + 4*rsi] mov qword ptr [rsp - 32], 0 mov dword ptr [rsp - 88], 0 mov dword ptr [rsp - 100], 0 mov dword ptr [rsp - 72], 0 mov dword ptr [rsp - 96], 0 mov dword ptr [rsp - 92], 0 mov dword ptr [rsp - 52], 0 mov dword ptr [rsp - 84], 0 mov dword ptr [rsp - 80], 0 mov dword ptr [rsp - 76], 0 mov dword ptr [rsp - 44], 0 mov dword ptr [rsp - 68], 0 mov dword ptr [rsp - 64], 0 mov dword ptr [rsp - 60], 0 mov dword ptr [rsp - 56], 0 mov dword ptr [rsp - 48], 0 mov qword ptr [rsp + 224], r12 cmp rdi, r12 mov qword ptr [rsp + 96], rdi je .LBB12_2 .p2align 4 .LBB12_3: lea r13, [rdi + 4] cmp r13, r12 je .LBB12_4 lea r15, [rdi + 8] cmp r15, r12 je .LBB12_6 lea r14, [rdi + 12] cmp r14, r12 je .LBB12_8 lea rbx, [rdi + 16] cmp rbx, r12 je .LBB12_10 lea r11, [rdi + 20] cmp r11, r12 je .LBB12_12 lea r10, [rdi + 24] cmp r10, r12 je .LBB12_14 lea r9, [rdi + 28] cmp r9, r12 je .LBB12_16 lea r8, [rdi + 32] cmp r8, r12 je .LBB12_18 lea rax, [rdi + 36] cmp rax, r12 je .LBB12_20 mov qword ptr [rsp - 120], rax lea rax, [rdi + 40] mov qword ptr [rsp - 112], rax cmp rax, r12 je .LBB12_22 lea rdx, [rdi + 44] cmp rdx, r12 je .LBB12_24 lea rbp, [rdi + 48] cmp rbp, r12 je .LBB12_26 mov qword ptr [rsp - 40], r9 lea rcx, [rdi + 52] cmp rcx, r12 je .LBB12_30 lea r9, [rdi + 56] cmp r9, r12 je .LBB12_32 lea rax, [rdi + 60] cmp rax, r12 mov qword ptr [rsp - 24], r9 je .LBB12_34 mov qword ptr [rsp + 88], rax lea rax, [rdi + 64] mov qword ptr [rsp - 8], rax mov dword ptr [rsp - 128], 0 mov qword ptr [rsp - 16], rdi mov qword ptr [rsp + 56], r10 lea r10, [rsp + 216] mov qword ptr [rsp + 40], r10 mov qword ptr [rsp + 96], r13 lea rax, [rsp + 208] mov qword ptr [rsp + 32], rax mov qword ptr [rsp + 72], rdx lea rsi, [rsp + 200] mov qword ptr [rsp + 48], rbx lea rbx, [rsp + 192] mov qword ptr [rsp + 80], rcx lea rcx, [rsp + 184] mov qword ptr [rsp + 64], rbp lea rdx, [rsp + 176] mov qword ptr [rsp + 16], r14 lea r14, [rsp + 168] mov qword ptr [rsp + 24], r11 lea r11, [rsp + 160] lea r9, [rsp + 152] lea r12, [rsp + 144] lea r13, [rsp + 136] lea rbp, [rsp + 128] mov qword ptr [rsp], r15 lea r15, [rsp + 120] mov qword ptr [rsp + 8], r8 lea r8, [rsp + 112] lea rdi, [rsp + 104] jmp .LBB12_39 .p2align 4 .LBB12_2: mov qword ptr [rsp - 128], 0 jmp .LBB12_37 .p2align 4 .LBB12_4: mov eax, 1 mov qword ptr [rsp - 128], rax jmp .LBB12_37 .p2align 4 .LBB12_6: mov eax, 2 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_8: mov eax, 3 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_10: mov eax, 4 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_12: mov eax, 5 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_14: mov eax, 6 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_16: mov eax, 7 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_18: mov eax, 8 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_20: mov eax, 9 mov qword ptr [rsp - 128], rax jmp .LBB12_36 .LBB12_22: mov eax, 10 mov qword ptr [rsp - 128], rax mov rdi, qword ptr [rsp - 120] jmp .LBB12_36 .LBB12_24: mov eax, 11 mov qword ptr [rsp - 128], rax jmp .LBB12_27 .LBB12_26: mov eax, 12 mov qword ptr [rsp - 128], rax .LBB12_27: mov rsi, qword ptr [rsp - 112] mov rdi, qword ptr [rsp - 120] jmp .LBB12_36 .LBB12_30: mov rcx, rbp mov eax, 13 mov qword ptr [rsp - 128], rax jmp .LBB12_35 .LBB12_32: mov rax, rcx mov rcx, rbp mov esi, 14 mov qword ptr [rsp - 128], rsi jmp .LBB12_35 .LBB12_34: mov rax, rcx mov rcx, rbp mov esi, 15 mov qword ptr [rsp - 128], rsi .LBB12_35: mov rsi, qword ptr [rsp - 112] mov rdi, qword ptr [rsp - 120] mov r9, qword ptr [rsp - 40] .p2align 4 .LBB12_36: mov rbp, r13 .LBB12_37: mov r13, qword ptr [rsp - 24] mov qword ptr [rsp + 88], r13 mov r13, qword ptr [rsp - 128] mov qword ptr [rsp + 216], r13 mov r13b, 1 mov dword ptr [rsp - 128], r13d mov qword ptr [rsp - 24], rax mov qword ptr [rsp + 80], rcx mov qword ptr [rsp + 64], rdx mov qword ptr [rsp + 72], rsi mov qword ptr [rsp - 112], rdi mov qword ptr [rsp - 120], r8 mov qword ptr [rsp + 8], r9 mov qword ptr [rsp - 40], r10 mov qword ptr [rsp + 56], r11 mov qword ptr [rsp + 24], rbx mov qword ptr [rsp + 48], r14 mov qword ptr [rsp + 16], r15 mov qword ptr [rsp], rbp mov eax, 0 mov qword ptr [rsp - 16], rax mov qword ptr [rsp - 8], r12 lea r10, [rsp + 208] mov qword ptr [rsp + 40], r10 lea rax, [rsp + 200] mov qword ptr [rsp + 32], rax lea rsi, [rsp + 192] lea rbx, [rsp + 184] lea rcx, [rsp + 176] lea rdx, [rsp + 168] lea r14, [rsp + 160] lea r11, [rsp + 152] lea r9, [rsp + 144] lea r12, [rsp + 136] lea r13, [rsp + 128] lea rbp, [rsp + 120] lea r15, [rsp + 112] lea r8, [rsp + 104] lea rdi, [rsp + 232] .LBB12_39: mov r10, qword ptr [rsp + 96] mov rax, qword ptr [rsp + 40] mov qword ptr [rax], r10 mov rax, qword ptr [rsp + 32] mov r10, qword ptr [rsp] mov qword ptr [rax], r10 mov rax, qword ptr [rsp + 16] mov qword ptr [rsi], rax mov rax, qword ptr [rsp + 48] mov qword ptr [rbx], rax mov rax, qword ptr [rsp + 24] mov qword ptr [rcx], rax mov rax, qword ptr [rsp + 56] mov qword ptr [rdx], rax mov rax, qword ptr [rsp - 40] mov qword ptr [r14], rax mov rax, qword ptr [rsp + 8] mov qword ptr [r11], rax mov rax, qword ptr [rsp - 120] mov qword ptr [r9], rax mov rax, qword ptr [rsp - 112] mov qword ptr [r12], rax mov rax, qword ptr [rsp + 72] mov qword ptr [r13], rax mov rax, qword ptr [rsp + 64] mov qword ptr [rbp], rax mov rax, qword ptr [rsp + 80] mov qword ptr [r15], rax mov rax, qword ptr [rsp - 24] mov qword ptr [r8], rax mov rax, qword ptr [rsp + 88] mov qword ptr [rdi], rax cmp byte ptr [rsp - 128], 0 jne .LBB12_40 mov rax, qword ptr [rsp - 32] mov rcx, qword ptr [rsp - 16] add eax, dword ptr [rcx] mov qword ptr [rsp - 32], rax mov rax, qword ptr [rsp + 216] mov ecx, dword ptr [rsp - 88] add ecx, dword ptr [rax] mov dword ptr [rsp - 88], ecx mov rax, qword ptr [rsp + 208] mov ecx, dword ptr [rsp - 100] add ecx, dword ptr [rax] mov dword ptr [rsp - 100], ecx mov rax, qword ptr [rsp + 200] mov ecx, dword ptr [rsp - 72] add ecx, dword ptr [rax] mov dword ptr [rsp - 72], ecx mov rax, qword ptr [rsp + 192] mov ecx, dword ptr [rsp - 96] add ecx, dword ptr [rax] mov dword ptr [rsp - 96], ecx mov rax, qword ptr [rsp + 184] mov ecx, dword ptr [rsp - 92] add ecx, dword ptr [rax] mov dword ptr [rsp - 92], ecx mov rax, qword ptr [rsp + 176] mov ecx, dword ptr [rsp - 52] add ecx, dword ptr [rax] mov dword ptr [rsp - 52], ecx mov rax, qword ptr [rsp + 168] mov ecx, dword ptr [rsp - 84] add ecx, dword ptr [rax] mov dword ptr [rsp - 84], ecx mov rax, qword ptr [rsp + 160] mov ecx, dword ptr [rsp - 80] add ecx, dword ptr [rax] mov dword ptr [rsp - 80], ecx mov rax, qword ptr [rsp + 152] mov ecx, dword ptr [rsp - 76] add ecx, dword ptr [rax] mov dword ptr [rsp - 76], ecx mov rax, qword ptr [rsp + 144] mov ecx, dword ptr [rsp - 44] add ecx, dword ptr [rax] mov dword ptr [rsp - 44], ecx mov rax, qword ptr [rsp + 136] mov ecx, dword ptr [rsp - 68] add ecx, dword ptr [rax] mov dword ptr [rsp - 68], ecx mov rax, qword ptr [rsp + 128] mov ecx, dword ptr [rsp - 64] add ecx, dword ptr [rax] mov dword ptr [rsp - 64], ecx mov rax, qword ptr [rsp + 120] mov ecx, dword ptr [rsp - 60] add ecx, dword ptr [rax] mov dword ptr [rsp - 60], ecx mov rax, qword ptr [rsp + 112] mov ecx, dword ptr [rsp - 56] add ecx, dword ptr [rax] mov dword ptr [rsp - 56], ecx mov rax, qword ptr [rsp + 104] mov ecx, dword ptr [rsp - 48] add ecx, dword ptr [rax] mov dword ptr [rsp - 48], ecx mov rdi, qword ptr [rsp - 8] mov r12, qword ptr [rsp + 224] cmp rdi, r12 mov qword ptr [rsp + 96], rdi jne .LBB12_3 jmp .LBB12_2 .LBB12_40: mov eax, dword ptr [rsp - 88] add eax, dword ptr [rsp - 32] mov ecx, dword ptr [rsp - 72] add ecx, dword ptr [rsp - 100] add ecx, eax mov edx, dword ptr [rsp - 92] add edx, dword ptr [rsp - 96] mov eax, dword ptr [rsp - 52] add eax, edx add eax, ecx mov ecx, dword ptr [rsp - 80] add ecx, dword ptr [rsp - 84] mov edx, dword ptr [rsp - 76] add edx, ecx mov ecx, dword ptr [rsp - 44] add ecx, edx add ecx, eax mov edx, dword ptr [rsp - 64] add edx, dword ptr [rsp - 68] mov eax, dword ptr [rsp - 60] add eax, edx mov edx, dword ptr [rsp - 56] add edx, eax mov eax, dword ptr [rsp - 48] add eax, edx add eax, ecx add rsp, 240 .cfi_def_cfa_offset 56 pop rbx .cfi_def_cfa_offset 48 pop r12 .cfi_def_cfa_offset 40 pop r13 .cfi_def_cfa_offset 32 pop r14 .cfi_def_cfa_offset 24 pop r15 .cfi_def_cfa_offset 16 pop rbp .cfi_def_cfa_offset 8 ret ``` </details> to ```assembly simd_sum_slow: .cfi_startproc xor eax, eax cmp rsi, 16 jb .LBB12_4 shl rsi, 2 pxor xmm0, xmm0 pxor xmm1, xmm1 pxor xmm3, xmm3 pxor xmm2, xmm2 .p2align 4 .LBB12_2: movdqu xmm4, xmmword ptr [rdi] paddd xmm0, xmm4 movdqu xmm4, xmmword ptr [rdi + 16] paddd xmm1, xmm4 movdqu xmm4, xmmword ptr [rdi + 32] paddd xmm3, xmm4 movdqu xmm4, xmmword ptr [rdi + 48] paddd xmm2, xmm4 add rdi, 64 add rsi, -64 cmp rsi, 60 ja .LBB12_2 paddd xmm0, xmm3 paddd xmm1, xmm2 paddd xmm1, xmm0 pshufd xmm0, xmm1, 238 paddd xmm0, xmm1 pshufd xmm1, xmm0, 85 paddd xmm1, xmm0 movd eax, xmm1 .LBB12_4: ret ```
…lize, r=Amanieu Stabilize `unchecked_neg` and `unchecked_shifts` Features: `unchecked_neg`, `unchecked_shifts` Tracking issue: rust-lang#85122 r? `@Amanieu`
Show backtrace on allocation failures when possible And if an allocation while printing the backtrace fails, don't try to print another backtrace as that will never succeed. Split out of rust-lang#147725 to allow landing this independently of a decision whether or not to remove `-Zoom=panic`.
…crum Allow the global allocator to use thread-local storage and std::thread::current() Fixes rust-lang#115209. Currently the thread-local storage implementation uses the `Global` allocator if it needs to allocate memory in some places. This effectively means the global allocator can not use thread-local variables. This is a shame as an allocator is precisely one of the locations where you'd *really* want to use thread-locals. We also see that this lead to hacks such as rust-lang#116402, where we detect re-entrance and abort. So I've made the places where I could find allocation happening in the TLS implementation use the `System` allocator instead. I also applied this change to the storage allocated for a `Thread` handle so that it may be used care-free in the global allocator as well, for e.g. registering it to a central place or parking primitives. r? `@joboet`
float::minimum/maximum: say which exact IEEE operation this corresponds to There's both `minimum` and `minimumNumber`, so this seems worth clarifying. Also use code font for these names to make it more clear that they are technical terms.
…ent, r=chenyukang Remove outdated comment The comment was added in rust-lang#136897 , but wasn't removed when the feature gate was stabilized (again). Also, `it's` -> `its` :)
Rollup of 5 pull requests Successful merges: - rust-lang#147362 (Avoid suggesting constrain the associated type with unknown type) - rust-lang#149395 (float::minimum/maximum: say which exact IEEE operation this corresponds to) - rust-lang#149396 (Remove outdated comment) - rust-lang#149421 (Add a regression test for issue 129865) - rust-lang#149424 (Update books) r? `@ghost` `@rustbot` modify labels: rollup
- Implement remove_dir and remove_file. - Tested on qemu ovmf. Signed-off-by: Ayush Singh <ayush@beagleboard.org>
std: split up the `thread` module Almost all functionality in `std::thread` is currently implemented in `thread/mod.rs`, resulting in a *huge* file with more than 2000 lines and multiple, interoperating `unsafe` sections. This PR splits the file up into multiple different private modules, each implementing mostly independent parts of the functionality. The only remaining `unsafe` interplay is that of the `lifecycle` and `scope` modules, the `spawn_scoped` implementation relies on the live thread count being updated correctly by the `lifecycle` module. This PR contains no functional changes and only moves code around for the most part, with a few notable exceptions: * `with_current_name` is moved to the already existing `current` module and now uses the `name` method instead of calculating the name from private fields. The old code was just a reimplementation of that method anyway. * The private `JoinInner` type used to implement both join handles now has some more methods (`is_finished`, `thread` and the `AsInner`/`IntoInner` implementations) to avoid having to expose private fields and their invariants. * The private `spawn_unchecked_` (note the underscore) method of `Builder` is now a freestanding function in `lifecycle`. The rest of the changes are just visibility annotations. I realise this PR ended up quite large – let me know if there is anyway I can aid the review process. Edit: I've simplified the diff by adding an intermediate commit that creates all the new files by duplicating `mod.rs`. The actual changes in the second commit thus appear to delete the non-relevant parts from the respective file.
Clarify edge cases for Barrier::new ... since n-1 is undefined when the usize n is 0.
float::min/max: reference NaN bit pattern rules Also, the "in particular" transition to the signed zero handling was odd, so I rearranged things a bit: first a self-contained description of the semantics, then an explanation of which operations in other standards/libraries this most closely corresponds to. r? `@tgross35`
Added feature gate, documentation and tests also.
ThreadId generation fallback path: avoid spurious yields Fixes rust-lang/miri#4737 Alternative to rust-lang#149476 Cc `@orlp` `@joboet`
Implement `clamp_magnitude` method for primitive floats & signed integers Tracking issue rust-lang#148519 ACP rust-lang/libs-team#686
stabilize maybe_uninit_slice Tracking issue: rust-lang#63569 Closes: rust-lang#63569 FCP completed: rust-lang#63569 (comment) Removes: ```rs pub const fn slice_as_ptr(this: &[MaybeUninit<T>]) -> *const T; pub const fn slice_as_mut_ptr(this: &mut [MaybeUninit<T>]) -> *mut T; ```
…nieu [std][BTree] Fix behavior of `::append` to match documentation, `::insert`, and `::extend` Resolves rust-lang#145614
…metal, r=davidtwco Fix armv4t- and armv5te- bare metal targets These two targets currently force on the LLVM feature `+atomics-32`. LLVM doesn't appear to actually be able to emit 32-bit load/store atomics for these targets despite this feature, and emits calls to a shim function called `__sync_lock_test_and_set_4`, which nothing in the Rust standard library supplies. See [#t-compiler/arm > __sync_lock_test_and_set_4 on Armv5TE](https://rust-lang.zulipchat.com/#narrow/channel/242906-t-compiler.2Farm/topic/__sync_lock_test_and_set_4.20on.20Armv5TE/with/553724827) for more details. Experimenting with clang and gcc (as logged in that zulip thread) shows that C code cannot do atomic load/stores on that architecture either (at least, not without a library call inserted). So, the safest thing to do is probably turn off `+atomics-32` for these two Tier 3 targets. I asked `@Lokathor` and he said he didn't even use atomics on the `armv4t-none-eabi`/`thumbv4t-none-eabi` target he maintains. I was unable to reach `@QuinnPainter` for comment for `armv5te-none-eabi`/`thumbv5te-none-eabi`. The second commit renames the base target spec `spec::base::thumb` to `spec::base::arm_none` and changes `armv4t-none-eabi`/`thumbv4t-none-eabi` and `armv5te-none-eabi`/`thumbv5te-none-eabi` to use it. This harmonises the frame-pointer and linker options across the bare-metal Arm EABI and EABIHF targets. You could make an argument for harmonising `armv7a-none-*`, `armv7r-none*` and `armv8r-none-*` as well, but that can be another PR.
…ubilee In `BTreeMap::eq`, do not compare the elements if the sizes are different. Reverts rust-lang#147101 in library/alloc/src/btree/ rust-lang#147101 replaced some instances of code like `a.len() == b.len() && a.iter().eq(&b)` with just `a.iter().eq(&b)`, but the optimization that PR introduced only applies for `TrustedLen` iterators, and `BTreeMap`'s itertors are not `TrustedLen`, so this theoretically regressed perf for comparing large `BTreeMap`/`BTreeSet`s with unequal lengths but equal prefixes, (and also made it so that comparing two different-length `BTreeMap`/`BTreeSet`s with elements whose `PartialEq` impls that can panic now can panic, though this is not a "promised" behaviour either way (cc rust-lang#149122)) Given that `TrustedLen` is an unsafe trait, I opted to not implement it for `BTreeMap`'s iterators, and instead just revert the change. If someone else wants to audit `BTreeMap`'s iterators to make sure they always return the right number of items (even in the face of incorrect user `Ord` impls) and then implement `TrustedLen` for them so that the optimization works for them, then this can be closed in favor of that (or if the perf regression is deemed too theoretical, this can be closed outright). Example of theoretical perf regression: https://play.rust-lang.org/?version=beta&mode=release&edition=2024&gist=a37e3d61e6bf02669b251315c9a44fe2 (very rough estimates, using `Instant::elapsed`). In release mode on stable the comparison takes ~23.68µs. In release mode on beta/nightly the comparison takes ~48.351057ms.
tautschnig
approved these changes
Jan 20, 2026
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This is an automated PR to update the subtree/library branch to the changes from 2025-10-09 (rust-lang/rust@b6f0945) to 2025-12-03 (rust-lang/rust@646a3f8), inclusive.
Review this PR as usual, but do not merge this PR using the GitHub web interface. Instead, once it is approved, use
git pushto literally push the changes tosubtree/librarywithout any rebase or merge.