GitHub - Rican-Williams/8-Bit-Simple-Processor-Project: The 8-bit simple processor features two latches, an FSM, a 3:8 decoder, an ALU, and seven-segment displays. Latches store input data for ALU operations. The FSM cycles states to generate values for the decoder, which produces opcodes. The ALU executes arithmetic or logic based on these opcodes, with outputs displayed for easy reading.

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The 8-bit simple processor features two latches, an FSM, a 3:8 decoder, an ALU, and seven-segment displays. Latches store input data for ALU operations. The FSM cycles states to generate values for the decoder, which produces opcodes. The ALU executes arithmetic or logic based on these opcodes, with outputs displayed for easy reading.

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38decod.vhd		38decod.vhd
3_8decod.vhd		3_8decod.vhd
3to8.vhd		3to8.vhd
3to8decod.vhd		3to8decod.vhd
ALU.bsf		ALU.bsf
ALU.vhd		ALU.vhd
ALU2.vhd		ALU2.vhd
ALUP2.bsf		ALUP2.bsf
ALUP2.vhd		ALUP2.vhd
ALUgood.bsf		ALUgood.bsf
ALUgood.vhd		ALUgood.vhd
ALUwave.wvf.vwf		ALUwave.wvf.vwf
decod.vhd		decod.vhd
decod38.vhd		decod38.vhd
decod38.vwf		decod38.vwf
decod38symb.bsf		decod38symb.bsf
decod3to8.bsf		decod3to8.bsf
decod3to8.vhd		decod3to8.vhd
decodblock.bdf		decodblock.bdf
lab6 COE328.zip		lab6 COE328.zip
lab6.bdf		lab6.bdf
lab6.qpf		lab6.qpf
lab6.qsf		lab6.qsf
latchwave.vwf		latchwave.vwf
machine.bsf		machine.bsf
machine.vhd		machine.vhd
machinewave.vwf		machinewave.vwf
p2.bdf		p2.bdf
p2wave.vwf		p2wave.vwf
problem1.wvf.vwf		problem1.wvf.vwf
problem2wave.vwf		problem2wave.vwf
register1.bsf		register1.bsf
register1.vhd		register1.vhd
sseg.bsf		sseg.bsf
sseg.vhd		sseg.vhd