diff --git a/src/coreclr/jit/compiler.h b/src/coreclr/jit/compiler.h index e32fe88200c531..687a48c7b0e31e 100644 --- a/src/coreclr/jit/compiler.h +++ b/src/coreclr/jit/compiler.h @@ -9583,17 +9583,24 @@ class Compiler return XMM_REGSIZE_BYTES; } #elif defined(TARGET_ARM64) - if (compExactlyDependsOn(InstructionSet_VectorT128)) +#if defined(DEBUG) + if (JitConfig.JitUseScalableVectorT() && compOpportunisticallyDependsOn(InstructionSet_Sve)) { - return FP_REGSIZE_BYTES; + return SIZE_UNKNOWN; } else - { - // TODO: We should be returning 0 here, but there are a number of - // places that don't quite get handled correctly in that scenario +#endif // DEBUG + if (compExactlyDependsOn(InstructionSet_VectorT128)) + { + return FP_REGSIZE_BYTES; + } + else + { + // TODO: We should be returning 0 here, but there are a number of + // places that don't quite get handled correctly in that scenario - return FP_REGSIZE_BYTES; - } + return FP_REGSIZE_BYTES; + } #else assert(!"getVectorTByteLength() unimplemented on target arch"); unreached(); diff --git a/src/coreclr/jit/hwintrinsic.cpp b/src/coreclr/jit/hwintrinsic.cpp index 406e6a1369aeeb..f957231a2dd5f3 100644 --- a/src/coreclr/jit/hwintrinsic.cpp +++ b/src/coreclr/jit/hwintrinsic.cpp @@ -1000,7 +1000,7 @@ static const HWIntrinsicIsaRange hwintrinsicIsaRangeArray[] = { { NI_Illegal, NI_Illegal }, // Atomics { FIRST_NI_Vector64, LAST_NI_Vector64 }, // Vector64 { FIRST_NI_Vector128, LAST_NI_Vector128 }, // Vector128 - { NI_Illegal, NI_Illegal }, // VectorT + { FIRST_NI_VectorT, LAST_NI_VectorT }, // VectorT { NI_Illegal, NI_Illegal }, // Dczva { NI_Illegal, NI_Illegal }, // Rcpc { NI_Illegal, NI_Illegal }, // VectorT128 @@ -1369,6 +1369,15 @@ NamedIntrinsic HWIntrinsicInfo::lookupId(Compiler* comp, return NI_Illegal; } } + else if (isa == InstructionSet_VectorT) + { + // This instruction set should only be set when SVE is enabled. + // Baseline Vector will use InstructionSet_VectorT128. + if (!comp->compOpportunisticallyDependsOn(InstructionSet_Sve)) + { + return NI_Illegal; + } + } #endif #if defined(TARGET_XARCH) @@ -2234,7 +2243,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic, } #if defined(TARGET_ARM64) - if ((simdSize != 8) && (simdSize != 16)) + if ((simdSize != 8) && (simdSize != 16) && (simdSize != SIZE_UNKNOWN)) #elif defined(TARGET_XARCH) if ((simdSize != 16) && (simdSize != 32) && (simdSize != 64)) #endif // TARGET_* diff --git a/src/coreclr/jit/hwintrinsic.h b/src/coreclr/jit/hwintrinsic.h index 5267d426237a79..30f5d5e0274456 100644 --- a/src/coreclr/jit/hwintrinsic.h +++ b/src/coreclr/jit/hwintrinsic.h @@ -605,6 +605,14 @@ struct HWIntrinsicInfo *pSimdSize = lookup(id).simdSize; succeeded = true; } +#if defined(TARGET_ARM64) && defined(DEBUG) + else if (JitConfig.JitUseScalableVectorT() && HWIntrinsicInfo::IsScalable(id)) + { + *pSimdSize = SIZE_UNKNOWN; + succeeded = true; + } +#endif + return succeeded; } diff --git a/src/coreclr/jit/hwintrinsicarm64.cpp b/src/coreclr/jit/hwintrinsicarm64.cpp index c930f30bc3c8cc..b454600e3ceaf2 100644 --- a/src/coreclr/jit/hwintrinsicarm64.cpp +++ b/src/coreclr/jit/hwintrinsicarm64.cpp @@ -120,6 +120,10 @@ CORINFO_InstructionSet Compiler::lookupInstructionSet(const char* className) { return InstructionSet_Vector128; } + else if (strcmp(className, "VectorT") == 0) + { + return InstructionSet_VectorT; + } } return InstructionSet_ILLEGAL; diff --git a/src/coreclr/jit/hwintrinsiclistarm64sve.h b/src/coreclr/jit/hwintrinsiclistarm64sve.h index 46838cc80ca9c1..f16bb5100498d9 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64sve.h +++ b/src/coreclr/jit/hwintrinsiclistarm64sve.h @@ -497,6 +497,14 @@ HARDWARE_INTRINSIC(Sve, TransposeEven_Predicates, HARDWARE_INTRINSIC(Sve, TransposeOdd_Predicates, -1, 2, {INS_sve_trn2, INS_sve_trn2, INS_sve_trn2, INS_sve_trn2, INS_sve_trn2, INS_sve_trn2, INS_sve_trn2, INS_sve_trn2, INS_sve_trn2, INS_sve_trn2}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ReturnsPerElementMask) HARDWARE_INTRINSIC(Sve, ReverseElement_Predicates, -1, 1, {INS_sve_rev, INS_sve_rev, INS_sve_rev, INS_sve_rev, INS_sve_rev, INS_sve_rev, INS_sve_rev, INS_sve_rev, INS_sve_rev, INS_sve_rev}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ReturnsPerElementMask) +// *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** +// ISA Function name SIMD size NumArg Instructions Category Flags +// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE} +// *************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************** +// SVE Implementation of VectorT Intrinsics +#define FIRST_NI_VectorT NI_Illegal +#define LAST_NI_VectorT NI_Illegal + #endif // FEATURE_HW_INTRINSIC #undef HARDWARE_INTRINSIC diff --git a/src/coreclr/jit/importercalls.cpp b/src/coreclr/jit/importercalls.cpp index 9ac0c3848c6260..7dbd1a369b1a7e 100644 --- a/src/coreclr/jit/importercalls.cpp +++ b/src/coreclr/jit/importercalls.cpp @@ -10751,8 +10751,9 @@ NamedIntrinsic Compiler::lookupNamedIntrinsic(CORINFO_METHOD_HANDLE method) { #ifdef FEATURE_HW_INTRINSICS bool isVectorT = strcmp(className, "Vector`1") == 0; + bool isVector = strcmp(className, "Vector") == 0; - if (isVectorT || (strcmp(className, "Vector") == 0)) + if (isVectorT || isVector) { if (strncmp(methodName, "System.Runtime.Intrinsics.ISimdVector